VHDL程序错误 Error (10482): VHDL error at washtop.vhd(33): object "o" is used but not declared

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity washerTop is
port(
load,start,clk : in std_logic;
k : in std_logic_vector(5 downto 0);--数据开关，设置时间
a,b,c,d,e,f,g : out std_logic;
time_remain : buffer std_logic_vector(3 downto 0) );
end washerTop;
architecture top of washerTop is
component settime
port( load:in std_logic;
k :in std_logic_vector(5 downto 0);
o :out std_logic_vector(3 downto 0)
);
end component;
component counter
port( clk,start :in std_logic;
k :in STD_LOGIC_VECTOR(3 downto 0);
time_remain :BUFFER STD_LOGIC_VECTOR(3 DOWNTO 0);
time_is_up :out std_logic
);
end component;
component showtime
port( remain_time :in std_logic_vector(3 downto 0);
a,b,c,d,e,f,g :out std_logic
);
end component;
begin
U0: settime
port map(load,k,o);
U1: counter
port map(clk, start,o, time_remain, timeUp );
U2: showtime
port map(time_remain, clk, a, b, c, d, e, f, g);
end top;

begin
U0：
前面加上这句：
SIGNAL time_is_up :STD_LOGIC;
SIGNAL o,remain_time:STD_LOGIC_VECTOR(3 DOWNTO 0);

这段程序没有错