Quartus 2<<Error: Top-level design entity "nend2" is undefined

代码如下：

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY nand2 IS
PORT(a,b:IN BIT;
p:OUT BIT);
END nand2;
ARCHITECTURE behave OF nand2 IS
BEGIN
p<= a NAND b AFTER 5 ns;
END behave;

实体名与文件相同

顶层文件设置正确

编译通不过，请问为什么？

谢谢