毕业设计要文献翻译，感谢各位朋友帮忙了，小弟英语不行，非常感谢了

I. INTRODUCTION
Before the CMOS process is scaled into deep sub-micro
process, the dynamic energy loss has always dominated the
total power dissipation, while leakage dissipation is little [1, 2].
Leakage current has been increasing exponentially with the
rapid technology scaling, so that leakage dissipations can’t be
neglected anymore, which attracts extensive attentions [3-7].
There are several sources of leakage currents: sub-
threshold leakage current due to very low threshold voltage
(VB
TB
), gate leakage current due to very thin gate oxide (TB
OXB
),
and band-to-band tunneling leakage current due to heavily-
doped halo [6, 7]. Several reduction techniques for leakage
dissipation, such as dual threshold CMOS (DTCMOS),
power-gating technique, stacking transistor techniques,
variable threshold CMOS (VTCMOS), and input vector
control, have been proposed in recent years and achieved
considerable energy savings [3-5].

一，导言 CMOS工艺之前被缩放到深亚微米过程中，动态能量损失一直主宰总功率耗散，同时泄漏功耗为小[1，2]。泄漏电流指数一直在增加的技术的快速扩展，使泄漏不能放荡被忽视了，这吸引了广泛关注[3-7]。有几个来源，漏电流：由于阈值泄漏电流非常低阈值电压（VBTB的结核病），栅极漏电流，由于非常薄栅氧化层（TOX），。减少渗漏的几个技术耗散，如双阈值CMOS（DTCMOS），功率门控技术，堆叠晶体管技术，可变阈值CMOS（VTCMOS）和输入向量控制，已建议在最近几年取得相当多的能源节约[3-5]。