基于STM32和DDS芯片实现的正交信号发生器

基于STM32和DDS芯片实现的正交信号发生器

使用的ad9854 行么

#include "ad9854.h"

unsigned char table9854[8];

void delay(uint32_t t)
{
unsigned int i=0;
while(t--)
for(i=0;i<=1000;i++);
}

void Port_IO_Init(void)
{

GPIO_InitTypeDef GPIO_InitStruct ;

GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP ;
GPIO_InitStruct.GPIO_Pin = MASTER_RESET_PORT | IO_UPDATE_PORT | FBH_PORT | RD_PORT | WR_PORT | SHAPED_LEYING_PORT ;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz ;

RCC_APB2PeriphClockCmd (RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC, ENABLE );

GPIO_Init (CTRL_PORT, &GPIO_InitStruct);

GPIO_InitStruct.GPIO_Pin = ADDRESS_PORT | DATA_PORT ;

GPIO_Init (DAD_PORT, &GPIO_InitStruct);

}

void send_byte(unsigned char add,unsigned char data)
{
WR(1);
delay(2);
ADDRESS(add);
delay(2);
WR(0);
delay(2);
DATA(data);
delay(2);
WR(1);
delay(2);
delay(20);
IO_UPDATE(0);
delay(20);
IO_UPDATE(1);
delay(20);
IO_UPDATE(0);
delay(20);
}

void ad9854_ftw1 (uint64_t f)
{
send_byte(FTW1_6,(((uint64_t)(f*256)/100000000))&(0x0000000000ff));
send_byte(FTW1_5,(((uint64_t)(f*65536)/100000000))&(0x0000000000ff));
send_byte(FTW1_4,(((uint64_t)(f*16777216)/100000000))&(0x0000000000ff));
send_byte(FTW1_3,(((uint64_t)(f*33554432)/1953125))&(0x0000000000ff));
send_byte(FTW1_2,(((uint64_t)(f*2147483648)/1953125))&(0x0000000000ff));
send_byte(FTW1_1,(((uint64_t)(f*549755813888)/1953125))&(0x0000000000ff));
}



void ad9854v(float v)
{
if(v>=1)
{
table9854[6]=0xff;
table9854[7]=0xff;
}
else
{
table9854[6]=((uint16_t)(v*4096))/256;//??
table9854[7]=((uint16_t)(v*4096))%256;//???????256
}
send_byte(OSKI_2,table9854[6]); //0~11? 2^12 1V (x/4096)*1=K x=4096k
send_byte(OSKI_1,table9854[7]);
send_byte(OSKQ_2,table9854[6]);
send_byte(OSKQ_1,table9854[7]);
}

void init_9854(void)
{
Port_IO_Init();
MASTER_RESET(0);
delay(200);
MASTER_RESET(1);
delay(200);
MASTER_RESET(0);
delay(2);
send_byte(REFCLK,0x01);
delay(2);
send_byte(MOD,0x02);
delay(2);
send_byte(PD,0x00);
delay(2);
send_byte(OSK_S,0x40);
delay(2);
send_byte(UDCLK_1,0x20);
delay(2);
IO_UPDATE(0);
delay(20);
IO_UPDATE(1);
delay(20);
IO_UPDATE(0);
delay(20);

}



#ifndef _AD9854_H_
#define _AD9854_H_

#include "stm32f10x.h"

#define PAR1_H 0x00 //Phase Adjust Register#1<13:8>
#define PAR1_L 0x01 //Phase Adjust Register#1<7:0>
#define PAR2_H 0x02 //Phase Adjust Register#2<13:8>
#define PAR2_L 0x03 //Phase Adjust Register#2<7:0>
#define FTW1_6 0x04 //Frequency Tuning Word1<47:40>
#define FTW1_5 0x05 //Frequency Tuning Word1<39:32>
#define FTW1_4 0x06 //Frequency Tuning Word1<31:24>
#define FTW1_3 0x07 //Frequency Tuning Word1<23:16>
#define FTW1_2 0x08 //Frequency Tuning Word1<15:8>
#define FTW1_1 0x09 //Frequency Tuning Word1<7:0>
#define FTW2_6 0x0A //Frequency Tuning Word2<47:40>
#define FTW2_5 0x0B //Frequency Tuning Word2<39:32>
#define FTW2_4 0x0C //Frequency Tuning Word2<31:24>
#define FTW2_3 0x0D //Frequency Tuning Word2<23:16>
#define FTW2_2 0x0E //Frequency Tuning Word2<15:8>
#define FTW2_1 0x0F //Frequency Tuning Word2<7:0>
#define DFW_6 0x10 //Delta Frequency Word<47:40>
#define DFW_5 0x11 //Delta Frequency Word<39:32>
#define DFW_4 0x12 //Delta Frequency Word<31:24>
#define DFW_3 0x13 //Delta Frequency Word<23:16>
#define DFW_2 0x14 //Delta Frequency Word<15:8>
#define DFW_1 0x15 //Delta Frequency Word<7:0>
#define UDCLK_4 0x16 //Update Clock<31:24>
#define UDCLK_3 0x17 //Update Clock<23:16>
#define UDCLK_2 0x18 //Update Clock<15:8>
#define UDCLK_1 0x19 //Update Clock<7:0>
#define RRC_3 0x1A //Ramp Rate Clock<19:16>
#define RRC_2 0x1B //Ramp Rate Clock<15:8>
#define RRC_1 0x1C //Ramp Rate Clock<7:0>
#define PD 0x1D //Power Down:DC,DC,DC,Comp PD,0,QDAC PD,DAC PD,DIG PD
#define REFCLK 0x1E //REFCLK:DC,PLL Range,Bypass PLL,RM4,RM3,RM2,RM1,RM0
#define MOD 0x1F //MOD:CLR ACC1,CLR ACC2,Triangle,SRC QDAC,M2,M1,M0,Int Update Clk
#define OSK_S 0x20 //OSK&SERIAL COM:DC,Bypass Inv Sinc,OSK EN,OSK INT,DC,DC,LSB First,SDO Active
#define OSKI_2 0x21 //Output Shape Key I Mult<11:8>
#define OSKI_1 0x22 //Output Shape Key I Mult<7:0>
#define OSKQ_2 0x23 //Output Shape Key Q Mult<11:8>
#define OSKQ_1 0x24 //Output Shape Key Q Mult<7:0>
#define OSKRR 0x25 //Output Shape Key Ramp Rate<7:0>
#define QDAC_2 0x26 //QDAC<11:8>
#define QDAC_1 0x27 //QDAC<7:0>

#define DAD_PORT GPIOC
#define CTRL_PORT GPIOA

#define ADDRESS_PORT GPIO_Pin_0 |GPIO_Pin_1 |GPIO_Pin_2 |GPIO_Pin_3 |GPIO_Pin_4 |GPIO_Pin_5
#define DATA_PORT GPIO_Pin_6 |GPIO_Pin_7 |GPIO_Pin_8 |GPIO_Pin_9 |GPIO_Pin_10 |GPIO_Pin_11 |GPIO_Pin_12 | GPIO_Pin_13

#define MASTER_RESET_PORT GPIO_Pin_0
#define IO_UPDATE_PORT GPIO_Pin_1
#define FBH_PORT GPIO_Pin_2 //fsk/bpsk/hold
#define RD_PORT GPIO_Pin_3
#define WR_PORT GPIO_Pin_4
#define SHAPED_LEYING_PORT GPIO_Pin_5

#define MASTER_RESET(x) x? GPIO_SetBits ( CTRL_PORT , MASTER_RESET_PORT ) : GPIO_ResetBits ( CTRL_PORT , MASTER_RESET_PORT )
#define IO_UPDATE(x) x? GPIO_SetBits ( CTRL_PORT , IO_UPDATE_PORT ) : GPIO_ResetBits ( CTRL_PORT , IO_UPDATE_PORT )
#define FBH(x) x? GPIO_SetBits ( CTRL_PORT , FBH_PORT ) : GPIO_ResetBits ( CTRL_PORT , FBH_PORT )
//#define RD(x) x? GPIO_SetBits ( CTRL_PORT , RD_PORT ) : GPIO_ResetBits ( CTRL_PORT , RD_PORT )
#define WR(x) x? GPIO_SetBits ( CTRL_PORT , WR_PORT ) : GPIO_ResetBits ( CTRL_PORT , WR_PORT )
#define SHAPED_LEYING(x) x? GPIO_SetBits ( CTRL_PORT , SHAPED_LEYING_PORT ) : GPIO_ResetBits ( CTRL_PORT , SHAPED_LEYING_PORT )

#define ADDRESS(x) GPIO_Write (DAD_PORT , ((x&(ADDRESS_PORT)) | (GPIO_ReadOutputData (DAD_PORT) & 0xffc0)))
#define DATA(x) GPIO_Write (DAD_PORT , (((x<<6)&(DATA_PORT)) | (GPIO_ReadOutputData (DAD_PORT) & 0xc03f)))

void init_9854(void);
void ad9854_ftw1 (uint64_t f);
void delay(uint32_t t);
//void ad9854_ftw2 (uint64_t f);

#endif

你好！ 读dds芯片的手册，理解好控制信号，用stm32的GPIO驱动就可以了，动手试试一会儿就明白了。 打字不易，采纳哦！